78 #define SLAVE_ADDRESS 0x48
84 WDT_A_hold(WDT_A_BASE);
93 GPIO_setAsPeripheralModuleFunctionInputPin(
95 GPIO_PIN6 + GPIO_PIN7,
96 GPIO_SECONDARY_MODULE_FUNCTION
106 EUSCI_B_I2C_initSlaveParam
param = {0};
108 param.slaveAddressOffset = EUSCI_B_I2C_OWN_ADDRESS_OFFSET0;
109 param.slaveOwnAddressEnable = EUSCI_B_I2C_OWN_ADDRESS_ENABLE;
110 EUSCI_B_I2C_initSlave(EUSCI_B0_BASE, &
param);
113 EUSCI_B_I2C_enable(EUSCI_B0_BASE);
115 EUSCI_B_I2C_clearInterrupt(EUSCI_B0_BASE,
116 EUSCI_B_I2C_TRANSMIT_INTERRUPT0 +
117 EUSCI_B_I2C_STOP_INTERRUPT
120 EUSCI_B_I2C_enableInterrupt(EUSCI_B0_BASE,
121 EUSCI_B_I2C_TRANSMIT_INTERRUPT0 +
122 EUSCI_B_I2C_STOP_INTERRUPT
125 __bis_SR_register(CPUOFF + GIE);
134 #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
135 #pragma vector=USCI_B0_VECTOR
137 #elif defined(__GNUC__)
138 __attribute__((interrupt(USCI_B0_VECTOR)))
142 switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG))
146 case USCI_I2C_UCALIFG:
148 case USCI_I2C_UCNACKIFG:
150 case USCI_I2C_UCSTTIFG:
152 case USCI_I2C_UCSTPIFG:
155 case USCI_I2C_UCRXIFG3:
157 case USCI_I2C_UCTXIFG3:
159 case USCI_I2C_UCRXIFG2:
161 case USCI_I2C_UCTXIFG2:
163 case USCI_I2C_UCRXIFG1:
165 case USCI_I2C_UCTXIFG1:
167 case USCI_I2C_UCRXIFG0:
169 case USCI_I2C_UCTXIFG0:
170 EUSCI_B_I2C_slavePutData(EUSCI_B0_BASE,
174 case USCI_I2C_UCBCNTIFG:
176 case USCI_I2C_UCCLTOIFG:
178 case USCI_I2C_UCBIT9IFG:
MPU_initThreeSegmentsParam param